Re: [RFC] dma: passing "attributes" to dma_map_* routines

[akepner@sgi.com]

On Tue, Dec 18, 2007 at 05:50:42PM +0100, Stefan Richter wrote:

> Do I understand correctly?:  A device and the CPUs communicate via two
> separate memory areas:  A data buffer and a status FIFO.  The NUMA
> interconnect may reorder accesses of the device to the areas.  (Write
> accesses?  Read accesses?  Both?)

Yes, I think you understand. Reorderings are possible on reads and
writes. Things get synced up by either an interrupt or a write to
a memory region with a "barrier attribute". Memory allocated with
dma_alloc_coherent() gets the barrier attribute. The idea here is
to allow memory allocated with plain old malloc() or whatever to
get the same attribute.

> 
> To ensure synchronization between device and CPUs, you want to mark a
> memory area which is to be dma-mapped with a flag which says:  "Writes
> to the memory region will cause in-flight DMA to be flushed".  Whose
> writes?  A write access from the device or a write access from a CPU?

A write from the device, e.g., when the device writes to indicate
"data DMA is complete".

-- 
Arthur

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