On Mon, 2007-12-17 at 22:53 +0300, Sergei Shtylyov wrote:
> > - * PCI interrupts will come in on either the INTA or INTD interrups lines,
> > + * PCI interrupts will come in on either the INTA or INTD interrupts lines,
> "interrupt" here.
Quite right.
I did them by script and inspected, but didn't notice that one.
cheers, Joe
Signed-off-by: Joe Perches <[email protected]>
---
diff --git a/include/asm-mips/mach-wrppmc/mach-gt64120.h b/include/asm-mips/mach-wrppmc/mach-gt64120.h
index 00d8bf6..465234a 100644
--- a/include/asm-mips/mach-wrppmc/mach-gt64120.h
+++ b/include/asm-mips/mach-wrppmc/mach-gt64120.h
@@ -45,7 +45,7 @@
#define GT_PCI_IO_SIZE 0x02000000UL
/*
- * PCI interrupts will come in on either the INTA or INTD interrups lines,
+ * PCI interrupts will come in on either the INTA or INTD interrupt lines,
* which are mapped to the #2 and #5 interrupt pins of the MIPS. On our
* boards, they all either come in on IntD or they all come in on IntA, they
* aren't mixed. There can be numerous PCI interrupts, so we keep a list of the
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