On Sun, 2007-12-09 at 02:12 +0000, Ralf Baechle wrote:
> So where do we stand with this?
>
> As I understand the Cobalt system controller it is not possible to address
> ioport addresses below 0x10000000 at all on the PCI bus of the GT-64111.
> As such I think the best solution is a GT-64111-specific PCI fixup to
> clear out legacy resources. The IDE controller in the VIA VT82C586 could
> then be used only by its normal that is non-legacy address and
> commit fd6e732186ab522c812ab19c2c5e5befb8ec8115 could be reverted and PPC
> would be happy too?
If that is the case though (that is it can't issue low ioport cycles),
how would have the fd6e7321... worked in the first place ? Hrm...
strange. My understanding is that all that patch does is put junk in the
pci_dev resource structures :-) Maybe that's enough to cause the PCI
layer later on to be unhappy about them and reassign the BARs to some
place that works ? In which case, you are right, a better approach is a
quirk on this specific platform, or even better, mark 0...0x10000000
busy in ioport_resources and let the generic code clash & re-assign...
I must admit I'm a bit confused tho...
Anyway, so far, nobody is arguing in favor of keeping this patch in nor
so far trying and explanation on why it wouldn't be totally bogus, so I
suggest we revert it :-)
Cheers,
Ben.
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