Re: SCSI breakage on non-cache coherent architectures

From: Benjamin Herrenschmidt <[email protected]>
Date: Tue, 20 Nov 2007 06:51:14 +1100

> On Mon, 2007-11-19 at 00:38 -0800, David Miller wrote:
> > From: Benjamin Herrenschmidt <[email protected]>
> > Date: Mon, 19 Nov 2007 16:35:23 +1100
> > 
> > You could make a ____dma_cacheline_aligned and use that.
> > It seems pretty reasonable.
> 
> I was thinking about that. What archs would need it ? arm, mips, what
> else ?

The sparc32 port would need it too.

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