Hi Sam,
> > commit 0b35786d77ba4037f181982cc8ca20a7a3bf0fd2
> > Author: Milton Miller <[email protected]>
> > Date: Fri Sep 21 18:09:02 2007 -0500
> >
> > kbuild: call make once for all targets when O=.. is used
> >
> > Change the invocations of make in the output directory Makefile and the
> > main Makefile for separate object trees to pass all goals to one $(MAKE)
> > via a new phony target "sub-make" and the existing target _all.
> >
> > When compiling with separate object directories, a separate make is called
> > in the context of another directory (from the output directory the main
> > Makefile is called, the Makefile is then restarted with current directory
> > set to the object tree). Before this patch, when multiple make command
> > goals are specified, each target results in a separate make invocation.
> > With make -j, these invocations may run in parallel, resulting in multiple
> > commands running in the same directory clobbering each others results.
> >
> > I did not try to address make -j for mixed dot-config and no-dot-config
> > targets. Because the order does matter, a solution was not obvious.
> > Perhaps a simple check for MAKEFLAGS having -j and refusing to run would
> > be appropriate.
> >
> > Signed-off-by: Milton Miller <[email protected]>
> > Signed-off-by: Sam Ravnborg <[email protected]>
> >
> > So, am I facing a kbuild regression?
>
> Yes - I will try to fix it during the weekend (if Milton does not beat me).
> Thanks for reporting and bisecting!
Have you made any progress on this? Let me know, if I can assist with
testing.
Cheers,
Jan
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