Re: nVidia HPET force enable - merge requirements? (resend)

[Thomas Gleixner <tglx@linutronix.de>]

On Fri, 19 Oct 2007, Carlos Corbacho wrote:
> Would the following patch be more acceptable then? I've limited the device
> id's to just the nForce 4 chipset, because that's the only one I have here
> to test with at the moment - it appears to work fine:

Yes, looks good. It is just missing the resume part, which is
necessary to reenable the hpet after suspend/resume.
 
> hpet clockevent registered
> hpet0: at MMIO 0xfefff000, IRQs 2, 8, 31
> hpet0: 3 32-bit timers, 25000000 Hz
> Time: hpet clocksource has been installed.
> Switched to high resolution mode on CPU 0
> Switched to high resolution mode on CPU 1
> 
> At the moment, I'm not clear on how to detect if the HPET has not been
> enabled by the BIOS (but given that this is hidden behind hpet=force,
> would this be acceptable, since the user would have to explicitly call
> hpet=force, and then it either works or doesn't?)

Don't worry. If HPET is enabled in the BIOS, then we have an
hpet_address already before we come into the force enable
quirk. That's why we check for hpet_address in the quirk code.

     tglx

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