Thomas Gleixner wrote:
On Tue, 2 Oct 2007, Andi Kleen wrote:
OTOH, the accounting hook would allow us to remove the IRQ#0 -> CPU#0
restriction. Not sure whether it's worth the trouble.
Some SIS chipsets hang the machine when you migrate irq 0 to another
CPU. It's better to keep that Also I wouldn't be surprised if there are some
other assumptions about this elsewhere.
Ok in theory it could be done only on SIS, but that probably would really
not be worth the trouble
Agreed.
I just got a x8664-hrt report, where I found the following oddity:
0: 1197 172881 IO-APIC-edge timer
That's one of those infamous AMD C1E boxen. Strange, all my systems have
IRQ#0 on CPU#0 and nowhere else. Any idea ?
tglx
Here I have with stock FC7 (2.6.22.9-91) kernel :
0: 107835 133459760 IO-APIC-edge timer
Processor:
vendor_id : AuthenticAMD
cpu family : 15
model : 107
model name : AMD Athlon(tm) 64 X2 Dual Core Processor 4000+
stepping : 1
cpu MHz : 2109.721
cache size : 512 KB
MB:
Asus M2N-E (NF570)
--Mika
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