Re: [PATCH] ahci: enable GHC.AE bit before set GHC.HR

[Jeff Garzik <jeff@garzik.org>]

Alan Cox wrote:
> On Wed, 26 Sep 2007 00:03:19 -0400
> Jeff Garzik <jeff@garzik.org> wrote:
>
> > Peer Chen wrote:
> > > According to the description of section 5.2.2.1 and 10.1.2 of AHCI specification rev1_1/rev1_2, GHC.HR shall only be set to ¡®1¡¯
> > > by software when GHC.AE is set to ¡®1¡¯.
> > >
> > > Signed-off-by: Peer Chen <peerchen@gmail.com>
> > > ---
> > > --- linux-2.6.23-rc7/drivers/ata/ahci.c.orig	2007-09-20 11:01:55.000000000 -0400
> > > +++ linux-2.6.23-rc7/drivers/ata/ahci.c	2007-09-20 11:07:31.000000000 -0400
> > > @@ -834,6 +834,10 @@ static int ahci_reset_controller(struct 
> > >  	void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
> > >  	u32 tmp;
> > >  
> > > +        /* turn on AHCI mode before controller reset*/
> > > +        writel(HOST_AHCI_EN, mmio + HOST_CTL);
> > > +        (void) readl(mmio + HOST_CTL);  /* flush */
> > applied the attached patch, inspired by yours.
>
>
> NAK - mmio is an iomap so writel and readl are the wrong things to use

The patch is consistent with the rest of the driver.

You are welcome to submit a patch to convert ahci to using ioremap.

	Jeff



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