Venkat Subbiah wrote:
Most of the load in my system is triggered by a single ethernet IRQ.
Essentially the IRQ schedules a tasklet and most of the work is done in the
taskelet which is scheduled in the IRQ. From what I read looks like the
tasklet would be executed on the same CPU on which it was scheduled. So this
means even in an SMP system it will be one processor which is overloaded.
So will using the user space IRQ loadbalancer really help?
A little bit. It'll keep other IRQs on different CPUs, which will prevent other
interrupts from causing cache and TLB evictions that could slow down the
interrupt handler for the NIC.
What I am doubtful
about is that the user space load balance comes along and changes the
affinity once in a while. But really what I need is every interrupt to go to
a different CPU in a round robin fashion.
Doing it in a round-robin fashion will be disastrous for performance. Your
cache miss rate will go through the roof and you'll hit the slow paths in the
network stack most of the time.
Looks like the APIC can distribute IRQ's dynamically? Is this supported in
the kernel and any config or proc interface to turn this on/off.
/proc/irq/$FOO/smp_affinity is a bitmask. You can mask an irq to multiple
processors. Of course, this will absolutely kill your performance. That's why
irqbalance never does this.
-- Chris
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