On 20 Aug, 01:50, "Dave Airlie" <[email protected]> wrote:
> Hi all,
>
> I've started doing some work with using the new DRM memory manager
> from TG for pixmaps in the X server using Intel 9xx series hardware.
>
> The intel hardware pretty much requires pages to be uncached for the
> GPU to access them. It can use cached memory for some operations but
> it isn't very useful and my attempts to use it ended in a lot of
> crashiness..
Write-combining access seems the correct thing here, followed by a
wmb(). Uncached writing would be horrendously slow.
[snip]
> So after all that I'd like to have some sort of uncached page list I
> can allocate pages from
This is exactly what Intel's PAT mechanism exists for - just mark the
desired access type (index) on the pages you've been allocated.
It's documented in the Intel Architecture Software Design manuals, but
Linux's support is lacking in certain areas [discussions on LKML],
which a number of developers have been trying to move forward.
Quite a few significant graphics/HPC etc vendors are forced to use it
without this complete support, so it would be good to get this
additional impetus involved...
Daniel
--
Daniel J Blueman
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