> Intel486???, Pentium??, or P6 family processors. The P6 family processors
> provide bus control signals that permit external memory subsystems to
> make split accesses atomic; however, nonaligned data accesses will
Normally in standard SMP systems between CPUs they are atomic AFAIK
(modulo bugs)
You're right -- i'm not sure about P5 SMP.
> seriously impact the performance of the processor and should be avoided
> where possible.
But they're also slow yes.
-Andi
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