Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures

On Wed, 15 Aug 2007, Stefan Richter wrote:

> LDD3 says on page 125:  "The following operations are defined for the
> type [atomic_t] and are guaranteed to be atomic with respect to all
> processors of an SMP computer."
> 
> Doesn't "atomic WRT all processors" require volatility?

Atomic operations only require exclusive access to the cacheline while the 
value is modified.


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• References:
  • [PATCH 0/24] make atomic_read() behave consistently across all architectures
    • From: Chris Snook <[email protected]>
  • Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures
    • From: Christoph Lameter <[email protected]>
  • Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures
    • From: Satyam Sharma <[email protected]>
  • Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures
    • From: Stefan Richter <[email protected]>

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