On 7/20/07, Mathieu Desnoyers <[email protected]> wrote:
* Mike Frysinger ([email protected]) wrote:
> On 7/20/07, Mathieu Desnoyers <[email protected]> wrote:
> >I am currently passing through each architectures adding a
> >cmpxchg_local() to each system.h, and I notice that you disable
> >interrupts in your cmpxchg() implementation, why are you doing so ?
>
> because Blackfin lacks any atomic instructions
>
> >Also, does you assembly stub _really_ modify memory atomically ? If yes,
> >then there should be no need for disabling interrupts. Else, I see a
> >major problem with SMP.
>
> that isnt the only problem with SMP on Blackfin
>
> >I also don't like the comment in asm-blackfin/atomic.h :
> >
> > * Generally we do not concern about SMP BFIN systems, so we don't have
> > * to deal with that.
> >
> >I have seen on the blackfin website that you actually sell a board with
> >SMP. Why aren't you caring about it ?
>
> just because a processor has more than one core does not make it SMP
I see, thanks for the reply. Is there a particular reason for
implementing system.h/cmpxchg() in assembly rather that in plain C then?
honestly ? probably not :)
Bernd would probably know best (he's good like that)
-mike
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