Chuck Ebbert wrote:
>> - The VGA recalc has the same bug as the assembly version where a VGA write protected
>> register is written (Overflow register) without setting the enable bit (see VGA docs).
I dug into this, and it turns out you're incorrect. Both the assembly
code and the C code are, in fact, 100% correct:
The only instance of writing the vertical overflow register is this code
in vga_set_480_scanlines():
out_idx(0x0c, crtc, 0x11); /* Vertical sync end, unlock CR0-7 */
out_idx(0x0b, crtc, 0x06); /* Vertical total */
out_idx(0x3e, crtc, 0x07); /* Vertical overflow */
out_idx(0xea, crtc, 0x10); /* Vertical sync start */
out_idx(end, crtc, 0x12); /* Vertical display end */
out_idx(0xe7, crtc, 0x15); /* Vertical blank start */
out_idx(0x04, crtc, 0x16); /* Vertical blank end */
Register 0x11 has the Protect (not enable!) bit in it, it is bit 7. As
you can see, it is cleared (meaning writable) at the beginning of this
sequence, and the fact that it's being done is even documented.
-hpa
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