RE: [PATCH] ata: Add the SW NCQ support to sata_nv for MCP51/MCP55/MCP61

["Kuan Luo" <kluo@nvidia.com>]

A pretty good way.  I will modify my code.

-----Original Message-----
From: Andrew Morton [mailto:akpm@linux-foundation.org] 
Sent: Wednesday, June 27, 2007 5:21 PM
To: Kuan Luo
Cc: linux-kernel@vger.kernel.org; jeff@garzik.org; Peer Chen
Subject: Re: [PATCH] ata: Add the SW NCQ support to sata_nv for
MCP51/MCP55/MCP61

On Wed, 27 Jun 2007 17:09:29 +0800 "Kuan Luo" <kluo@nvidia.com> wrote:

> > +static void nv_swncq_qc_to_dq(struct ata_port *ap, struct
> ata_queued_cmd *qc)
> > +{
> > +	struct nv_swncq_port_priv *pp = ap->private_data;
> > +	defer_queue_t	*dq = &pp->defer_queue;
> > +	
> > +	/* queue is full */
> > +	WARN_ON((dq->rear + 1) % (ATA_MAX_QUEUE + 1) == dq->front);
> 
> >This is peculiar.  The array is sized ATA_MAX_QUEUE+1 (ie: 33) and
the
> code
> >uses ATA_MAX_QUEUE+1 everywhere.
> 
> >It looks to me like the ata code was designed to queue up to 32
> elements
> >and all this code has taken that to 33.  What exactly is going on
here?
> 
> 
> The code is designed to contain 32 elements. But the position of rear
> doesn't point to
> a valid element to check whether the queue is full or null. If front
==
> rear , queue is null.
>  if (rear + 1) % (ATA_MAX_QUEUE + 1) == front, queue is full.
> So the value of the array is 32 + 1.

that's the wrong way of doing a circular buffer..

It's better to allow the head and tail indices to wrap all the way
through
0xffffffff and only mask them when they are actually used for
subscripting.
That way:

add:
	array[head++ & (ATA_MAX_QUEUE-1)] = item;

remove:
	item = array[tail++ & (ATA_MAX_QUEUE-1)];

full:
	head - tail == ATA_MAX_QUEUE

empty:
	head == tail

number of items:
	head - tail

This requires that the array size be a power of two.


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