Re: Problem with global_flush_tlb() on i386 (x86_64? too) in 2.6.22-rc4-mm2

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* Andi Kleen ([email protected]) wrote:
> On Tuesday 19 June 2007 22:01:36 Mathieu Desnoyers wrote:
> > Looking more closely into the code to find the cause of the
> > change_page_addr()/global_flush_tlb() inconsistency, I see where the
> > problem could be:
> 
> Yes it's a known problem. I have a hack queued for .22 and there
> are proposed patches for .23 too.
> 
> ftp://ftp.firstfloor.org/pub/ak/x86_64/late-merge/patches/cpa-flush
> 
> -ANdi
> 

Hi Andi,

Although I cannot find it at the specified URL, I suspect it is already
in Andrew's tree, in 2.6.22-rc4-mm2, under the name

"x86_64-mm-cpa-cache-flush.patch"

But Andrew's
"revert-x86_64-mm-cpa-cache-flush.patch"

Is applied subsequently, along with the Changelog:

From: Andrew Morton <[email protected]>

This causes my dual-pIII to hang after "write protecting kernel memory".

config: http://userweb.kernel.org/~akpm/config-vmm.txt

Cc: Andi Kleen <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>

Is the version found in 2.6.22-rc4-mm2 the latest ?

I propose to verify if the i386:

if (!PageReserved(kpte_page)) {
   if (cpu_has_pse

check should be also integrated into the global flush tlb ? It would
cause machines not supporting PSE to try to free non existing large
pages, and also would cause problems with reserved pages.

It does not seem to fix the hang on my P4 neither though.

Mathieu

-- 
Mathieu Desnoyers
Computer Engineering Ph.D. Student, Ecole Polytechnique de Montreal
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F  BA06 3F25 A8FE 3BAE 9A68
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