> Hmmm... indeed. Alan, is there any reason we do that in ->set_piomode
> not ->mode_filter? We end up with mismatching configuration between the
> controller and the higher speed drive.
We always talk more slowly than the drive which is just fine. Just about
every device on every controller does some variant of this, usually just
for the address setup timings. Our current behaviour (both old and new
IDE) may actually not be conservative enough for register rather than
data timings, which quite possibly should always be at the lower speed.
Currently the PATA drivers use mode_filter to remove modes not allowed
due to hardware issues/flaws/etc and a mix of their own timer merging and
the intelligence in the ata_timing functions to work out what timing
pattern should be used.
Beyond looking further into the register load timings and maybe making
the 8bit timings more conseratively merged (as Sergei I think feels they
should be) I don't plan to change this.
Alan
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