Re: [BUG] (regression) AMD k6-III/450 won't boot w/2.6.22-rc1

[Andi Kleen <ak@suse.de>]

On Wednesday 16 May 2007 17:53, Chuck Ebbert wrote:
> Bob Tracy wrote:
> > Jan Engelhardt wrote:
> >>> On Tue, 15 May 2007 22:13:14 -0500 (CDT) Bob Tracy wrote:
> >>>> The 2.6.22-rc1 boot panics early in amd_mcheck_init() with my
> >>>> k6-III/450.
> >
> > Intel machine check architecture supported.
> > general protection fault: 0000 [#1]
> > PREEMPT
> > Modules linked in:
> > CPU:   0
> > EIP: 0060:[<c01079f4>]  Not tainted VLI
> > EFLAGS: 00010286   (2.6.22-rc1 #1)
> > EIP is at amd_mcheck_init+0x2b/0xc3
>
> rdmsr with ecx == 0x179 (Machine Check Global Capabilities Register)
>
> Probably K6 doesn't have that.

Hmpf.

We cold either use rdmsr_safe or add a family check again or clear it 
in k6 setup.  I think clearing it in setup is cleanest.

Does this patch work?

-Andi

Clear MCE flag on AMD K6

It reports machine check capability in CPUID, but doesn't actually
implement all the necessary MSRs of the standard Intel machine
check architecture.

This fixes a boot failure recently introduced.

Signed-off-by: Andi Kleen <ak@suse.de>

Index: linux/arch/i386/kernel/cpu/amd.c
===================================================================
--- linux.orig/arch/i386/kernel/cpu/amd.c
+++ linux/arch/i386/kernel/cpu/amd.c
@@ -280,6 +280,10 @@ static void __cpuinit init_amd(struct cp
 
 	if (c->x86 == 0x10 && !force_mwait)
 		clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
+
+	/* K6s reports MCEs but don't actually have all the MSRs */
+	if (c->x86 < 6) 
+		clear_bit(X86_FEATURE_MCE, c->x86_capability);
 }
 
 static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned 
int size)
Index: linux/arch/i386/kernel/cpu/mcheck/k7.c
===================================================================
--- linux.orig/arch/i386/kernel/cpu/mcheck/k7.c
+++ linux/arch/i386/kernel/cpu/mcheck/k7.c
@@ -72,12 +72,12 @@ void amd_mcheck_init(struct cpuinfo_x86 
 	u32 l, h;
 	int i;
 
-	machine_check_vector = k7_machine_check;
-	wmb();
-
 	if (!cpu_has(c, X86_FEATURE_MCE))
 		return;
 
+	machine_check_vector = k7_machine_check;
+	wmb();
+
 	printk (KERN_INFO "Intel machine check architecture supported.\n");
 	rdmsr (MSR_IA32_MCG_CAP, l, h);
 	if (l & (1<<8))	/* Control register present ? */
-
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