* Thomas Gleixner ([email protected]) wrote:
> On Mon, 2007-05-07 at 09:31 -0700, Chris Wright wrote:
> > Going through to see where we differ and if there's
> > any bits of my set that yours needs.
>
> Yes please.
OK, looks very similar all things considered. One thing I didn't do
was fix lapic timer calibration (was hoping you'd do that part, and you
did ;-) I've noticed that something has changed and I'm seeing irq0
handled on cpu3 (4 cpu system), where it used to be on cpu0 as expected.
In addition lapic timer is firing there, and I'm seeing a higher
interrupt load than I used to. This is the same in your set and mine.
Following is small set of patches that were the more obvious bits.
thanks,
-chris
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