On 8 May 2007, at 09:26, Mikael Pettersson wrote:
On Tue, 8 May 2007 08:22:17 +0100, Michael-Luke Jones wrote:
AFAIK, it's a HW limitation of the IXP4xx NPEs, or
possibly Intel's microcode for them.
I run my IXP42x boxes big-endian and don't mind doing so.
/Mikael
*cough*
http://www.hohnstaedt.de/ixp_npe/0.2.0/0001-IXP4XX-Driver-for-NPE-
QMGR-MAC-0.2.0.txt
:p
---
On 8 May 2007, at 09:29, Tomasz Chmielewski wrote:
Christian Hohnstaedt's work did support LE though.
Indeed.
Krzysztof, why is LE not supported?
Butting in here. It's not supported because LE mode has to work in a
brain-damaged way. NPE DMAs the complete skb straight out of RAM.
Unfortunately it expects the skb to already be written out in ram BE.
Thus, in LE mode we have to byteswap the skb with CPU before the NPE
can DMA it. This hasn't been implemented yet.
Michael-Luke Jones
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