RE: [PATCH 0/2] Add percpu smp cacheline align section

["Yu, Fenghua" <fenghua.yu@intel.com>]

On Mon, May 07, 2007 at 10:30:16AM -0700, Christoph Lameter wrote:
> Call this area "cpu shared" or so?

There are some fields in percpu section which are accessed by other
cpu's but not cache line aligned, e.g. cpu_idle_state, flush_state in
x86-64. We don't want to place those fields into same subsection as
cacheline aligned fields.

So perhaps, I can change the section name
.data.percpu.cacheline_aligned_in_smp to
.data.percpu.shared_cacheline_aligned. And change macro
DEFINE_PER_CPU_CACHELINE_ALIGNED_IN_SMP to
DEFINE_PER_CPU_SHARED_CACHELINE_ALIGNED.

.data.percpu.shared_cacheline_aligned contains only cpu shared percpu
fields which are cacheline aligned. In future (or in a separate patch
series), we can define another percpu section .data.percpu.shared and
its macro DEFINE_PER_CPU_SHARED_CACHELINE_ALIGNED which store all of cpu
shared percpu fields. The new .data.percpu.shared and
DEFINE_PER_CPU_SHARED_CACHELINE_ALIGNED are for better coding and
understanding.

Thanks.

-Fenghua
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