Andy Whitcroft wrote:
>> To my knowledge, moving to a higher base page size has its advantages in
>> TLB reach, but brings with it some pretty serious downsides. Especially
>> in caching small files. Internal fragmentation in the page cache
>> significantly affecting system performance. So much so that development
>> is ongoing to see if supporting sub-base-page objects in the buffer
>> cache could be beneficial.
On Fri, Apr 27, 2007 at 01:08:17AM +1000, Nick Piggin wrote:
> I think 16K would be pretty reasonable (ia64 tends to use it). I guess
> powerpc went to 64k either because that's what databases want or because
> their TLB refills are too slow, so the internal fragmentation bites
> them a lot harder.
> But that was more of a side comment, because I still think io controllers
> should be easily capable of operation on 4K pages. Graphics cards are,
> aren't they?
Base page size need only be a power-of-two multiple of the MMU pagesize.
ISTR the 64KB PAGE_SIZE in ppc64 being motivated by TLB considerations.
There is not going to be a way to improve how well IO controllers deal
with 4K pages. The scatter/gather lists for smaller fragments will
require more device communication overhead no matter what, and
furthermore, the more discontiguity, the more seekiness.
-- wli
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