From: Andi Kleen <[email protected]>
Date: Tue, 24 Apr 2007 23:12:54 +0200
> We already have a couple of other IOMMU architectures who essentially have the same
> problem. Have you checked how they solve this?
Sparc64, for one, only uses 32-bit IOMMU addresses. And we simply
don't try to handle the funny devices at all, in fact we can't
handle the ones that want mappings only in the low 16MB for
example since the hardware IOMMU window usually starts in the
middle of the 32-bit PCI address space.
We do it both because that's faster due to Single Address Cycles, as
mentioned, and also because that's simply is where the hardware's
IOMMU window is. You can't use 64-bit IOMMU addresses even if you
wanted to on sparc64.
My suggestion would be to allocate top-down in the 32-bit IOMMU space.
That might work, but my gut feeling is that this won't be sufficient
and we'll need some kind of device driver initiated reservation
mechanism for the <16MB et al. weird stuff.
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