Nick Piggin wrote:
It looks like the tlb flushes (and IPIs) from zap_pte_range()
could have been the problem. They're gone now.
I guess it is a good idea to batch these things. But can you
do that on all architectures? What happens if your tlb flush
happens after another thread already accesses it again, or
after it subsequently gets removed from the address space via
another CPU?
I have thought about this a lot tonight, and have come to the conclusion
that they are ok.
The reason is simple:
1) we do the TLB flush before we return from the
madvise(MADV_FREE) syscall.
2) anything that accessess the pages between the start
and end of the MADV_FREE procedure does not know in
which order we go through the pages, so it could hit
a page either before or after we get to processing
it
3) because of this, we can treat any such accesses as
happening simultaneously with the MADV_FREE and
as illegal, aka undefined behaviour territory and
we do not need to worry about them
4) because we flush the tlb before releasing the page
table lock, other CPUs cannot remove this page from
the address space - they will block on the page
table lock before looking at this pte
--
Politics is the struggle between those who want to make their country
the best in the world, and those who believe it already is. Each group
calls the other unpatriotic.
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