Rik van Riel wrote:
Nick Piggin wrote:
Nick Piggin wrote:
Eric Dumazet wrote:
ah ok, this is because accessed/dirty bits are set by hardware and
not a page fault.
No it isn't.
That is to say, it isn't required for correctness. But if the
question was about avoiding a fault, then yes ;)
Making the pte clean also needs to clear the hardware writable
bit on architectures where we do pte dirtying in software.
If we don't, we would have corruption problems all over the VM,
for example in the code around pte_clean_one :)
Sure. Hence why I say that having hardware set a/d bits are not
required for correctness ;)
But as Linus recently said, even hardware handled faults still
take expensive microarchitectural traps.
Nowhere near as expensive as a full page fault, though...
I don't doubt that. Do you know rough numbers?
The lazy freeing is aimed at avoiding page faults on memory
that is freed and later realloced, which is quite a common
thing in many workloads.
I would be interested to see how it performs and what these
workloads look like, although we do need to fix the basic glibc and
madvise locking problems first.
The obvious concerns I have with the patch are complexity (versus
payoff), behaviour under reclaim, and behaviour when freed memory
isn't reallocated very quickly (eg. degrading cache performance).
We'll see, I guess...
--
SUSE Labs, Novell Inc.
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