Benjamin Herrenschmidt writes:
> > > For a 64K page size kernel, we have 3 level page tables and we use 3
> > > caches: a PGD pages are 128 bytes (yeah, not big heh...), our pmd
> > > pages are 32K (half a page) and PTE pages are PAGE_SIZE (64K).
> >
> > Ok so use quicklists for the PTEs and slab for the rest? A PGD of only 128
> > bytes? Stuff one at the end of the mm_struct or the task struct? That way
> > you can avoid allocation overhead.
>
> Yeah, maybe... I need to think about it a bit more. I might be able to
> make the PMD a full page too.
There was a reason for making the PMD level map 256MB. I'd have to
remember what that was and make sure it didn't apply any more first...
Paul.
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