Dave,
On G965, I810_PGETBL_CTL is a mmio offset, but we wrongly take it
as pci config space offset in detecting GTT size. This one line patch
fixs this.
Signed-off-by: Wang Zhenyu <[email protected]>
---
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index a9fdbf9..4c05c71 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -431,9 +431,8 @@ static void intel_i830_init_gtt_entries(
if (IS_I965) {
u32 pgetbl_ctl;
-
- pci_read_config_dword(agp_bridge->dev, I810_PGETBL_CTL,
- &pgetbl_ctl);
+ pgetbl_ctl = readl(intel_i830_private.registers+I810_PGETBL_CTL);
+
/* The 965 has a field telling us the size of the GTT,
* which may be larger than what is necessary to map the
* aperture.
---
-
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