> Lets say that we want to do MW DMA mode 2. This has the minimum timing
> of 70ns active, 25ns recovery, 120ns cycle time.
>
> When you quantise those figures using a clock period of 62.5ns (16MHz)
> you end up with: 2 clocks active (2*62.5 > 70), 1 clock recovery
> (1*62.5 > 25) and 2 clocks cycle (2*62.5 > 120).
>
> Last time I checked, active + recovery must always be equal to the cycle
> time, and unless my math is failing me, 2 + 1 does not equal 2.
Do you mean active + recovery must be less than or equal to the cycle
time? Because 70ns + 25ns does not equal 120ns either...
- R.
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