[PATCH 0/3] extend alternative instruction framework to support more than one alternative

["Joerg Roedel" <joerg.roedel@amd.com>]

Hi,

this small series of patches extend the alternative instructions
framework on i386 and x86_64 architectures to support more than one
alternative per instruction. The last patch in this series includes a
first use of this extension to optimize the get_cycles_sync() function.

The extension works as follows:

The alt_instr struct is extended with 2 more fields:

	u8  used;
	u8  instr_cpuid;

which are both set to 0 for all existing entries. If an existing entry
should have more than one alternative instruction the further
alternatives are encoded in a following alt_instr structure. In this
case the 'use' variable is either 1 oder 2 in that following structure.
This encodes the number of further alternative instructions in that
struct. The first following instruction is pointed to by the *instr
pointer in the struct. Its matching cpuid field is 'instr_cpuid'. The
third alternative is encoded like the first one in the original entry
using the *replacement pointer and the cpuid field.  These following
structs could be cascaded to support an arbitrary number of alternative
instructions.  When applying the alternative instructions the sequence
of alternatives is scanned and the first matching entry wins.  The
patches should apply cleanly to recent Linus git kernels.

Regards,
Joerg

-- 
Joerg Roedel
Operating System Research Center
AMD Saxony LLC & Co. KG


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