On Wed, 14 Feb 2007 13:53:08 -0800
Zachary Amsden <[email protected]> wrote:
> > IDE on several platforms has performance critical paths that use
> > ndelay(400) or failing that udelay(1)
>
> Ok, I buy that. A 486DX / 33 Mhz processor takes 10 cycles to issue a
> CALL / RET pair. This is about 300ns. Is there an issue with being too
> early to issue I/O operations or too late?
Too early you lose, too late you just waste clock time.
> But I fail to see how such careful timing can be done at this
> granularity on such hardware without well tweaked assembly code.
Thats what is used most platforms use udelay(1) in fact however
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