Linus Torvalds wrote:
On Fri, 26 Jan 2007, David Woodhouse wrote:
You're thinking of MMIO, while the case we were discussing was PIO. My
laptop is perfectly happy to assign PIO resources from zero.
I was indeed thinking MMIO, but I really think it should extend to PIO
also. It certainly is (again) true on PC's, where the low IO space is
special and reserved for motherboard/system devices.
Via the even-less-of-an-excuse-than-you-thought department:
Many (most?) non-x86 handle PIO via special mappings and additional
serialization instructions, but otherwise treat PIO register space in a
very similar manner to MMIO.
Thus, it's /easier/ on non-x86 to ensure that PIO addresses never land
at zero, because you must remap /anyway/. It's only on x86 that PIO
register spaces are accessed by vastly different CPU instructions. Most
other arches convert PIO accesses into massage+mmio R/W+massage.
On sparc64, for example, after I pointed this out to DaveM, he was able
to implement the new iomap interface without the 'if (pio-mem-area)'
branch present on x86.
Jeff
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