On Wed, 13 Dec 2006, Nick Piggin wrote:
>
> parisc seems to, but sparc uses its own open coded spinlock for bitops, and
> the array of regular spinlocks for atomic ops. OTOH, consolidating them
> might give more scalable code *and* a smaller cacheline footprint?
Yeah, I think you'd actually end up with better behaviour by just sharing
the lock logic, so I don't think there are any downsides there.
> > Should we also just make the rule be that the architecture _must_ allow the
> > silly
> >
> > (atomic_long_t *) -> (unsigned long *)
> >
> > casting (so that we can make _one_ generic inline function that takes an
> > atomic_long_t and returns the same pointer as an "unsigned long *" to make
> > bitop functions happy), or would this have to be another arch-specific
> > function?
> >
> > Comments?
>
> AFAIK no architecture does anything special, so maybe a generic converter
> would be best, until one comes along that does. (the only thing of note
> really is that half of the atomics use volatile types and half don't, is
> that a problem?).
No, the cast would cast away any such differences, and since anybody would
have to use asm for the actual implementation, the code can't care about
the absense or presense of "volatile" anyway.
Linus
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