On Fri, 8 Dec 2006, Russell King wrote: > > Yes you can. Well, you can on ARM at least. Between the load exclusive > you can do anything you like until you hit the store exclusive. If you > haven't touched the location (with anything other than another load > exclusive) and no other CPU has issued a load exclusive, your store > exclusive succeeds. Is that actually true? Almost all LL/SC implementations have granularity rules, where "touch the location" is not a byte-granular thing, but actually ends up being something like "touch the same cachline". They also often have _other_ rules like: "the cacheline has to stay in the L1 in exclusive state" etc. Which means that in a direct-mapped L1 cache, you can't even load anything that might be in the same way, because it would cause a cache eviction that invalidates the SC. It's possible that ARM has really strong LL/SC, but quite frankly, that sounds unlikely. I've never heard of anybody ever _architecturally_ saying that they support that strong requirements, even if certain micro- architectures might actually support stronger semantics than the ones guaranteed by the architectural rules. Linus - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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