On Wed, Dec 06, 2006 at 11:25:35AM -0800, Linus Torvalds wrote:
> Ok. For SMP-safety, it's important that any architecture that can't do
> this needs to _share_ the same spinlock (on SMP only, of course) that it
> uses for the bitops.
That doesn't help, since assignment can't be guarded by any lock.
> It would be good (but perhaps not as strict a requirement) if the atomic
> counters also use the same lock. But that is probably impossible on
> sparc32 (since it has a per-counter "lock"-like thing, iirc). So doing a
> cmpxchg() on an atomic_t would be a bug.
sparc32 switched over to the parisc way of doing things, so they could
expand their atomic_t to a full 32 bits. They still have the old
atomic_24_t lying around for their arch-private use, but atomic_t uses a
hashed spinlock.
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