On Wed, 29 Nov 2006 00:50:43 +0100
Stefan Richter <[email protected]> wrote:
> Alan wrote:
> > On Tue, 28 Nov 2006 22:24:11 +0100 (CET)
> > Stefan Richter <[email protected]> wrote:
> >> All MMIO writes which were surrounded by the spinlock as well as the
> >> very last MMIO write of the IRQ handler are now explicitly flushed by
> >> MMIO reads of the respective register.
> >
> > MMIO is ordered anyway on the bus, you just need mmiowb() to force
> > ordering to the bus controller in case you are on a big numa box.
>
> The mmiowb is a checkpoint to ensure ordering between different threads
> of MMIO writes; i.e. it doesn't halt the thread until the write actually
> reached the device like a read would do, right?
It guarantees that no other mmio will sneak past it from another thread
but doesn't guarantee the previous I/O has hit the hardware. It's a much
weaker (and thus far faster) guarantee which is usually sufficient as it
can be combined with spin_unlock to enforce I/O ordering matching the
lock ordering.
Alan
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