Alan wrote:
> On Tue, 28 Nov 2006 22:24:11 +0100 (CET)
> Stefan Richter <[email protected]> wrote:
>> All MMIO writes which were surrounded by the spinlock as well as the
>> very last MMIO write of the IRQ handler are now explicitly flushed by
>> MMIO reads of the respective register.
>
> MMIO is ordered anyway on the bus, you just need mmiowb() to force
> ordering to the bus controller in case you are on a big numa box.
The mmiowb is a checkpoint to ensure ordering between different threads
of MMIO writes; i.e. it doesn't halt the thread until the write actually
reached the device like a read would do, right?
--
Stefan Richter
-=====-=-==- =-== ===-=
http://arcgraph.de/sr/
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