H. Peter Anvin wrote:
Jeremy Fitzhardinge wrote:
Avi Kivity wrote:
Or gcc
might move the assignment of phys_addr to after the inline assembly.
"asm volatile" prevents that (and I'm not 100% sure it's necessary).
No, it won't necessarily. "asm volatile" simply forces gcc to emit the
assembler, even if it thinks its output doesn't get used. It makes no
ordering guarantees with respect to other code (or even other "asm
volatiles"). The "memory" clobbers should fix the ordering of the asms
though.
I think you're wrong about that; in particular, I'm pretty sure "asm
volatiles" are ordered among themselves. What the "volatile" means is
"this has side effects you (the compiler) don't understand", and gcc
can't assume that it can reorder such side effects.
The gcc manual has this to say:
Similarly, you can't expect a sequence of volatile `asm' instructions
to remain perfectly consecutive. If you want consecutive output, use a
single `asm'. Also, GCC will perform some optimizations across a
volatile `asm' instruction; GCC does not "forget everything" when it
encounters a volatile `asm' instruction the way some other compilers do.
I wonder how we are supposed to code the following sequence:
asm volatile ("blah") /* sets funky processor mode */
some_c_code();
asm volatile ("unblah");
Let's say "blah" disables floating point exceptions, and some_c_code()
must run without exceptions. Is is possible to code this in gcc without
putting functions in another translation unit? Is a memory clobber
sufficient? I'd certainly hate to use it.
--
Do not meddle in the internals of kernels, for they are subtle and quick to panic.
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