>> No intel document guarantees you that if more CPUs
>> simultaneously execute locked cmpxchg in a loop that a
>
> If we are talking 2048 cpus, we are talking ia64.
IA64 spinlock is locked cmpxchg, if failed than pause (i386 equivalent of
rep nop) read the value, and if unlocked, try cmpxchg again.
There is no fairness in it.
I suppose we could use something better.
There is the MCS lock, the related CLH lock, and IBM's
improvement on the MCS lock. As with RCU, we'd need
to get IBM's permission to use their lock. (so, how did we
get permission for RCU?) The basic MCS lock is also
patented I think.
http://www.cs.rochester.edu/~scott/professional/Dijkstra/presentation.html
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