> we could, but it would have to be almost empty right now :-) Reason:
> even on systems that have (hardware-initialized) 'perfect' TSCs and
> which do not support any frequency scaling or power-saving mode, our
> current TSC initialization on SMP systems introduces a small (1-2 usecs)
> skew.
On Intel we don't sync the TSC anymore and on most systems users seem
to be happy at least. And on multicore AMD it is drifting anyways and
usually turned off.
-Andi
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