On Friday 10 November 2006 10:43, Eric Dumazet wrote:
>
> Therefore I suggest to use a structure like that :
>
> struct memnode {
> int shift;
> unsigned int mapsize; /* no need to use 8 bytes here */
> u8 *map;
> u8 embedded_map[64-8]; /* total size = 64 bytes */
> } ____cacheline_aligned;
>
Arg... [64 - 16] sorry
> and make memnode.map point to memnode.embedded_map if mapsize <= 56 ?
mapsize <= 48
>
> This way, most AMD64 dual/quad processors wont waste a full PAGE to store
> few bytes in it, and should use only one cache line.
>
> Thank you
>
> Eric
>
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