On Fri, 20 Oct 2006 22:37:31 +0200
Ingo Molnar <[email protected]> wrote:
>
> * Andrew Morton <[email protected]> wrote:
>
> > > > I don't know how many machines will be affected by this, but I'd
> > > > expect it's quite a few - the Vaio has a less-than-one-year-old
> > > > Intel CPU in it.
> > >
> > > Is this still the broken lapic issue ?
> >
> > yup. iirc the standard FC5 SMP kernel runs dog-slowly on that machine
> > too.
>
> hm. This is how lapic timer calibration works.
>
> the lapic timer is really simple - it counts down from a value and
> generates an irq if that counter reaches 0. Then it starts counting down
> again.
>
> the 'count down from' value is programmed via __setup_APIC_LVTT().
>
> we first write a 'really large' number into it (1 billion):
>
> __setup_APIC_LVTT(1000000000);
>
> the unit of counting is '16 system bus cycles'.
>
> i.e. if your system has a system bus of 333 MHz, then a value of 1
> billion takes 48 seconds to count down. (so the calibration ought to be
> pretty robust in this regard.)
>
> then we use the wait_timer_tick() function, which waits until the PIT
> counter reaches 0 (which is attached to the PIT whose frequency we know
> and thus the PIT is already programmed correctly). Hence by calling
> wait_timer_tick() we can generate a delay of one jiffy - and we can read
> out the current lapic timer count and determine the calibration factor.
>
> then we calculate the result as:
>
> result = (tt1-tt2)*APIC_DIVISOR/LOOPS;
>
> where tt1 is the counter before we start calibration, tt2 is the lapic
> timer counter after we did calibration. (APIC_DIVISOR is 16)
>
> i dont see where the error is - but there must be some calibration
> problem as your system shows a systematic 1:60 difference between
> expected and real lapic timer frequency.
>
Oh. I thought the problem was that the timer stops when the CPU is idle.
Maybe I misremembered. I'll try `idle=poll'.
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