On Fri, 2006-10-13 at 18:34 +0100, Alan Cox wrote:
> Ar Gwe, 2006-10-13 am 10:49 -0600, ysgrifennodd Matthew Wilcox:
> > No it didn't. It's undefined behaviour to perform *any* PCI config
> > access to the device while it's doing a D-state transition. It may have
>
> I think you missed the earlier parts of the story - the kernel caches
> the base config register state.
>
> > happened to work with the chips you tried it with, but more likely you
> > never hit that window because X simply didn't try to do that.
>
> Which is why the kernel caches the register state.
but... it didn't USE the cache in the case we're protecting here.
Instead the hardware would just go splat.
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