>From 1c8f534e446cd69f511c83378bb4501348a97ab1 Mon Sep 17 00:00:00 2001
From: Yeasah Pell <[email protected]>
Date: Tue, 3 Oct 2006 21:56:18 -0400
Subject: [PATCH] cx24123: fix PLL divisor setup
The cx24109 datasheet says: "NOTE: if A=0, then N=N+1"
The current code is the result of a misinterpretation of the datasheet to
mean exactly the opposite of the requirement -- The actual value of N is 1
greater than the value written when A is 0, so 1 needs to be *subtracted*
from it to compensate.
Signed-off-by: Yeasah Pell <[email protected]>
Signed-off-by: Steven Toth <[email protected]>
Signed-off-by: Michael Krufky <[email protected]>
---
drivers/media/dvb/frontends/cx24123.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/media/dvb/frontends/cx24123.c b/drivers/media/dvb/frontends/cx24123.c
index 274a87b..1e7e790 100644
--- a/drivers/media/dvb/frontends/cx24123.c
+++ b/drivers/media/dvb/frontends/cx24123.c
@@ -549,8 +549,8 @@ static int cx24123_pll_calculate(struct
ndiv = ( ((p->frequency * vco_div * 10) / (2 * XTAL / 1000)) / 32) & 0x1ff;
adiv = ( ((p->frequency * vco_div * 10) / (2 * XTAL / 1000)) % 32) & 0x1f;
- if (adiv == 0)
- ndiv++;
+ if (adiv == 0 && ndiv > 0)
+ ndiv--;
/* control bits 11, refdiv 11, charge pump polarity 1, charge pump current, ndiv, adiv */
state->pllarg = (3 << 19) | (3 << 17) | (1 << 16) | (pump << 14) | (ndiv << 5) | adiv;
-
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