We used to check whether pci_set_mwi() had succeeded by testing the
hardware MWI bit. Now we need only check the return value (and failing
to do so is a warning). Also, pci_set_mwi() will fail if the cache line
size is 0, so we don't need to check that ourselves any more.
Signed-off-by: Matthew Wilcox <[email protected]>
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
index d11d28c..64d999b 100644
--- a/drivers/net/tulip/tulip_core.c
+++ b/drivers/net/tulip/tulip_core.c
@@ -1135,7 +1135,6 @@ static void __devinit tulip_mwi_config (
{
struct tulip_private *tp = netdev_priv(dev);
u8 cache;
- u16 pci_command;
u32 csr0;
if (tulip_debug > 3)
@@ -1153,21 +1152,15 @@ static void __devinit tulip_mwi_config (
/* set or disable MWI in the standard PCI command bit.
* Check for the case where mwi is desired but not available
*/
- if (csr0 & MWI) pci_set_mwi(pdev);
- else pci_clear_mwi(pdev);
-
- /* read result from hardware (in case bit refused to enable) */
- pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
- if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
- csr0 &= ~MWI;
-
- /* if cache line size hardwired to zero, no MWI */
- pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
- if ((csr0 & MWI) && (cache == 0)) {
- csr0 &= ~MWI;
+ if (csr0 & MWI) {
+ if (pci_set_mwi(pdev))
+ csr0 &= ~MWI;
+ } else {
pci_clear_mwi(pdev);
}
+ pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
+
/* assign per-cacheline-size cache alignment and
* burst length values
*/
-
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