Re: New Intel feature flags.

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Hi Dave,

On 24/09/06, Dave Jones <[email protected]> wrote:
Add supplemental SSE3 instructions flag, and Direct Cache Access flag.
As described in "Intel Processor idenfication and the CPUID instruction
AP485 Sept 2006"

Signed-off-by: Dave Jones <[email protected]>

--- local-git/arch/i386/kernel/cpu/proc.c~      2006-09-23 20:46:35.000000000 -0400
+++ local-git/arch/i386/kernel/cpu/proc.c       2006-09-23 20:48:02.000000000 -0400
@@ -46,8 +46,8 @@ static int show_cpuinfo(struct seq_file

                /* Intel-defined (#2) */
                "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
-               "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
-               NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+               "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,

ssse3? Typo?

+               NULL, NULL, "dca", NULL, NULL, NULL, NULL, NULL,
                NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,

                /* VIA/Cyrix/Centaur-defined */

--
http://www.codemonkey.org.uk
-

Regards,
Michal

--
Michal K. K. Piotrowski
LTG - Linux Testers Group
(http://www.stardust.webpages.pl/ltg/)
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