On Thu, 2006-09-21 at 12:26, Jeff Garzik wrote:
> Zang Roy-r61911 wrote:
> > +#define TSI108_ETH_WRITE_REG(offset, val) \
> > + writel(le32_to_cpu(val),data->regs + (offset))
> > +
> > +#define TSI108_ETH_READ_REG(offset) \
> > + le32_to_cpu(readl(data->regs + (offset)))
> > +
> > +#define TSI108_ETH_WRITE_PHYREG(offset, val) \
> > + writel(le32_to_cpu(val), data->phyregs + (offset))
> > +
> > +#define TSI108_ETH_READ_PHYREG(offset) \
> > + le32_to_cpu(readl(data->phyregs + (offset)))
>
>
> NAK:
>
> 1) writel() and readl() are defined to be little endian.
>
> If your platform is different, then your platform should have its own
> foobus_writel() and foobus_readl().
Tsi108 bridge is designed for powerpc platform. Originally, I use
out_be32() and in_be32(). While there is no obvious reason to object
using this bridge in a little endian system. Maybe some extra hardware
logic needed for the bus interface. le32_to_cpu() can be aware the
endian difference.
Any comment?
>
> 2) TSI108_ETH_WRITE_REG() is just way too long. TSI_READ(),
> TSI_WRITE(), TSI_READ_PHY() and TSI_WRITE_PHY() would be far more
> readable.
>
> More in next email.
>
I will modify the name.
Roy
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