Ar Mer, 2006-09-20 am 14:28 -0400, ysgrifennodd Alan Stern:
> I've heard that to insure proper synchronization it's necessary to flush
> MMIO writes (writel, writew, writeb) to PCI devices by reading from the
> same area. Is this equally true for I/O-space writes (inl, inw, inb)?
writel/writew/writeb may be posted and delayed until a read from that
device. The outb/outw/outl operations are not posted but are
synchronous.
There may be posting in action both ways (your read may force not only
the write to complete but pending writes the other end). That usually
doesn't matter but very occasionally requires care.
> What about configuration space writes (pci_write_config_dword etc.)?
Usually this is entirely synchronous to PCI bus activity and main
memory. Occasionally chipsets get it slightly wrong
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