Assignment of GDT entries

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



What's the rationale for the current assignment of GDT entries? In particular, this section:

*   0 - null
*   1 - reserved
*   2 - reserved
*   3 - reserved
*
*   4 - unused			<==== new cacheline
*   5 - unused
*
*  ------- start of TLS (Thread-Local Storage) segments:
*
*   6 - TLS segment #1			[ glibc's TLS segment ]
*   7 - TLS segment #2			[ Wine's %fs Win32 segment ]
*   8 - TLS segment #3
*   9 - reserved
*  10 - reserved
*  11 - reserved


What are entries 1-3 and 9-11 reserved for? Must they be unused for some reason, or is there some proposed use that has not been impemented yet?

Also, is there a particular reason kernel GDT entries start at 12? Would there be a problem in using either 4 or 5 for a kernel GDT descriptor?

I'm asking because I'd like to use one of these entries for the PDA descriptor, so that it is on the same cache line as the TLS descriptors. That way, the entry/exit segment register reloads would still only need to touch two GDT cache lines. Would there be a real problem in doing this?

Thanks,
   J

-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[Index of Archives]     [Kernel Newbies]     [Netfilter]     [Bugtraq]     [Photo]     [Stuff]     [Gimp]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Linux RAID]     [Video 4 Linux]     [Linux for the blind]     [Linux Resources]
  Powered by Linux