On Mon, 11 Sep 2006, Paul E. McKenney wrote:
> This is a summary of the Linux memory-barrier semantics as I understand
> them:
>
> 1. A given CPU will always perceive its own memory operations
> as occuring in program order.
>
> 2. All stores to a given single memory location will be perceived
> as having occurred in the same order by all CPUs. This is
> "coherence". (And this is the property that I was forgetting
> about when I first looked at your second example.)
...
This can't be right. Together 1 and 2 would obviate the need for wmb().
The CPU doing "STORE A; STORE B" will always see the operations occuring
in program order by 1, and hence every other CPU would always see them
occurring in the same order by 2 -- even without wmb().
Either 2 is too strong, or else what you mean by "perceived" isn't
sufficiently clear.
Alan Stern
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