Re: Opinion on ordering of writel vs. stores to RAM

[Alan Cox <alan@lxorguk.ukuu.org.uk>]

Ar Llu, 2006-09-11 am 10:12 +1000, ysgrifennodd Benjamin Herrenschmidt:
>  - writel/readl are fully synchronous (minus mmiowb for spinlocks)
>  - we provide __writel/__readl with some barriers with relaxed ordering
> between memory and MMIO (though still _precise_ semantics, not arch
> specific)

I'd rather they were less precise than your later proposal but that
reflects the uses I'm considering perhaps.

>  * Option B:
> 
>  - The driver decides at ioremap time wether it wants a fully ordered
> mapping or not using

That is expensive because writel/readl end up full of if() while at the
moment they are often 1 instruction.


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